From Chips to Infrastructure: Converting Power into Useful Compute

During recent discussions with customers and industry partners, one question kept coming back: what is
becoming the truly scarce resource in the AI era?

For decades, the industry concentrated on putting more transistors onto silicon and extracting more
performance from each generation of technology. That work remains essential, but it no longer describes the entire challenge. AI is increasing demand for computation at a scale that brings power delivery, cooling
capacity and physical infrastructure directly into the engineering equation.

The defining challenge is not simply how to create more compute, but how to convert finite power into useful compute within real-world cost, reliability and infrastructure constraints.

Power is becoming an architectural constraint

The physical demands of AI are increasingly visible. The International Energy Agency’s Energy and AI report states plainly that “there is no AI without energy”, specifically the electricity needed by data centers. Its base-case projection shows global electricity generation supplying data centers rising from 460 TWh in 2024 to more than 1,000 TWh in 2030.

Operational evidence points in the same direction. Uptime Institute’s Global Data Center Survey 2026
describes an industry facing limited power availability, rising costs, cooling constraints and growing
complexity as it supports higher-density AI workloads.

These are not merely data-center issues. They reach back through the engineering chain. A semiconductor
may perform exceptionally well in isolation, but its value depends on how it behaves within a package, board and system. A locally optimal choice may create concentrated heat, complex power delivery or reduced reliability, while an architecture that looks less efficient at chip level may make the overall system easier to power, cool and operate.

We therefore need to broaden the traditional optimization target. Performance per watt remains important,
but future platforms will increasingly be judged by the useful compute they deliver per watt and per dollar
invested, within real-world infrastructure constraints.

Multi-Die is more than advanced packaging

Meeting these increasingly demanding power, bandwidth and integration requirements is one of the reasons Multi-Die architectures are becoming strategically important.

These architectures are often described in terms of chiplets, integration technologies and advanced
packaging. While these innovations are important, they only tell part of the story.

The deeper transformation is the need for multiphysics-aware engineering. Electrical, thermal and
mechanical interactions have always existed, but much of this complexity could historically be managed
through abstraction, expertise and conservative margins.

Multi-die architectures are changing that equation. Architectural choices, physical implementation and
manufacturing constraints expose and amplify interactions between these effects. Unexpected behavior can no longer be understood through isolated analyses or absorbed through additional margin. Engineers need explicit visibility into the physics to make informed trade-offs.

Multi-die should not be viewed as the next packaging evolution. It is a re-foundation of semiconductor
engineering, forcing multiphysics-aware methodologies from architecture exploration through implementation, verification, signoff, test and manufacturing. It is reshaping virtually every segment of EDA. Multi-die therefore represents more than a transition from monolithic silicon to chiplets. It marks a
progression from system-on-chip to system-on-package, and ultimately toward system-level and
infrastructure-aware engineering.

“Useful compute” must therefore be understood in context. The objective is not the performance of an
individual device, but the computation delivered by a complete system within real-world power, cooling and
infrastructure constraints. The most successful systems will convert available power into useful compute
most efficiently.

AI is accelerating the convergence of engineering knowledge

AI presents a paradox: it drives demand for increasingly complex multi-die systems while also helping
engineers manage them.

As multi-die systems become more multidisciplinary, critical decisions increasingly sit at the intersection of
architecture, implementation, thermal, reliability and manufacturing domains. Yet no engineer can
realistically be an expert in all of them. This is where AI, and particularly agentic AI, becomes especially
interesting.

An architect may not need to become a thermal expert, but may need a better understanding of how
architectural decisions influence thermal behavior, power delivery or reliability. Likewise, a thermal or
reliability expert may need better visibility into design intent and implementation choices without becoming a designer.

The opportunity is not simply to automate tasks. It is to make expertise more accessible across organizational and technical boundaries. AI does not replace expertise or trusted engineering tools. Physics remains the ground truth. AI can help engineers explore trade-offs and connect knowledge across domains, but decisions must ultimately be validated through physics-based analysis, simulation and signoff.

Opportunity for the UK

This combination of AI, multi-die and multiphysics-aware engineering creates opportunities that extend far
beyond semiconductor manufacturing.

The UK already plays an important role in disciplines underpinning modern compute systems, from processor architecture and semiconductor IP to modeling, simulation, software and engineering science. These capabilities become more valuable as understanding interactions across domains becomes as important as optimizing any individual component.

The UK Government’s UK Compute Roadmap recognizes compute as a strategic capability and a foundation
for AI competitiveness, while the AI Opportunities Action Plan highlights the importance of secure,
sustainable and scalable AI infrastructure. However, building more compute capacity alone will not be
sufficient.

Industry, academia and government should invest not only in compute capacity, but also in the skills,
engineering methodologies and cross-domain collaboration required to use that capacity efficiently.
If the defining challenge is converting power into useful compute, competitive advantage will depend on how effectively we connect architecture, silicon, packaging, software, AI, simulation and systems engineering. The opportunity for the UK is therefore not simply to participate in the AI revolution, but to help define how future compute systems are architected, engineered and optimized.

Looking beyond the chip

The semiconductor industry has been remarkably successful at extracting ever more value from silicon. The
next phase may be defined by how effectively we convert power into useful compute.

Multi-die architectures, multiphysics-aware engineering and agentic AI are interconnected responses to the same challenge: delivering greater computational value from finite power, engineering and infrastructure resources.

As AI reshapes what society expects from compute, success will depend not only on better chips, but also on our ability to understand physics, connect expertise and engineer complete systems. Semiconductor
engineering is no longer confined to the chip, or even to the package. It is increasingly becoming
infrastructure engineering.